SYSCTL_DID0_MAJ=SYSCTL_DID0_MAJ_REVA, SYSCTL_DID0_MIN=SYSCTL_DID0_MIN_0
Device Identification 0
SYSCTL_DID0_MIN | Minor Revision 0 (SYSCTL_DID0_MIN_0): Initial device, or a major revision update 1 (SYSCTL_DID0_MIN_1): First metal layer change 2 (SYSCTL_DID0_MIN_2): Second metal layer change |
SYSCTL_DID0_MAJ | Major Revision 0 (SYSCTL_DID0_MAJ_REVA): Revision A (initial device) 1 (SYSCTL_DID0_MAJ_REVB): Revision B (first base layer revision) 2 (SYSCTL_DID0_MAJ_REVC): Revision C (second base layer revision) |
SYSCTL_DID0_CLASS | Device Class 5 (SYSCTL_DID0_CLASS_BLIZZARD): Tiva™ C Series Blizzard-class microcontrollers |
SYSCTL_DID0_VER | DID0 Version 1 (SYSCTL_DID0_VER_1): Second version of the DID0 register format |